unicorn · Issues· 217 open

x86 self modifying code regression broken

RISC-V: U-mode hpmcounter* reads retire even with mcounteren=0

RISC-V: fsgnj.d/fmv.d retire without F/D extension

RISC-V: D-width atomic instructions retire on harts without the A extension

RISC-V: execution starts from an odd PC (IALIGN=16 violation)

RISC-V: mret sets mstatus.MPP=U on harts without U-mode

Memonic pcmpistri return incorrect index

[Feature Request] Improve Windows-native host/target header generation for Android cross-compilation

MIPS emulation goes into “Branch in delay / forbidden slot” scenario when virtual tlb is enabled

Suggestions for improving SECURITY.md

RISC-V: allow guest trap handlers to receive exceptions

Bindings split plan, repo structural changes notice and call for contributors

Memory access rights ignored unless mem hook is set

Flaky test: arm_movr12_hang intermittently fails on the macos-14 - x86_64 wheel job

[Possible Bug] Fetch rip-based address failure with UC_ERR_FETCH_UNMAPPED